Paper Presentation & Seminar Topics: Two Techniques for Fast Computation of Constrained Shortest Paths

Two Techniques for Fast Computation of Constrained Shortest Paths

Computing constrained shortest paths is fundamental to some important network functions such as QoS routing, MPLS path selection, ATM circuit routing, and traffic engineering. The problem is to find the cheapest path that satisfies certain constraints. In particular, finding the cheapest delay-constrained path is critical for real-time data flows such as voice/video calls. Because it is NP-complete, much research has been designing heuristic algorithms that solve the -approximation of the problem with an adjustable accuracy. A common approach is to discretize (i.e., scale and round) the link delay or link cost, which transforms the original problem to a simpler one solvable in polynomial time. The efficiency of the algorithms directly relates to the magnitude of the errors introduced during discretization. In this paper, we propose two techniques that reduce the discretization errors, which allow faster algorithms to be designed. Reducing the overhead of computing constrained shortest paths is practically important for the successful design of a high-throughput QoS router, which is limited at both processing power and memory space. Our simulations show that the new algorithms reduce the execution time by an order of magnitude on power-law topologies with 1000 nodes. The reduction in memory space is similar.

Existing System:-

• The first scheme is to implement them as on-line algorithms that Process the routing requests as they arrive.In practice, on-line algorithms are not always desired. When the request arrival rate is high (major gateways may receive thousands or tens of thousands of requests every second), even the time complexity of Dijkstra’s algorithm will overwhelm the router if it is executed on a per-request basis.1 To solve this problem, the second scheme is to extend a link-state protocol (e.g., OSPF) and periodically pre-compute the cheapest delay-constrained paths for all destinations.

Proposed System:-

• Two techniques are used to randomize discretization and path delay discretization, to design fast algorithms for computing constrained shortest paths.

• The algorithms based on these techniques run much faster than the best existing algorithm that solves the -approximation of DCLC.

Hardware Specification:

• Processor : Pentium Iv 2.6 GHz
• Ram : 512 Mb Dd Ram
• Monitor : 15” Color
• Hard Disk : 20 Gb

Software Specification:

• Front End : Java, Swing
• Tools Used : JBuilder
• Operating System : WindowsXP