This Blog Provide Topics, Abstracts, Documentations, Slides for various Seminars, Projects, Paper Presentations. After Reading Abstract You Can Download Corresponding Paper By Clicking The Link Given At The Bottom. On The Right Side Bar Select Your Branches CSE, ECE, EEE, IT, MCA, MBA, Civil, Mechanical Departments And More Stuff Will Be Added From Time To Time. So Please Be In Touch With This Blog For More And Apt Information.
|Speech Compression| |Data Security| |Artificial Neural Networks| |Moletronics| |AI Speech Recognition| |ATM| |Blue Eyes| |Brain Computer Interface| |Fuzzy Logic| |Mobile Voting| |Information Security Using Steganography| |Modern Irrigation Systems| |Asynchronous Chip| |Smartphone| |Gizmag|Subtractive Synthesis | Spread Spectrum | Speech Compression | Paper Batteries | Satellite Encryption | Robotics 1 2 | Silicon in Nanotechnology | Renewable Energy Systems | Reed Solomon Code | Vlsi Paper Presentation | Green Nanotechnology | Aerospace Nanotechnology | Nanotechnology | Brain Controlled Car 1 | Bubble Power | Brain Machine Interface | Beam Robotics Nervous Systems | Artificial Photosynthesis | Neural Networks | Adaptive Filtering | Finger Print Recognizer | Vlsi Chip | Digital Water Marking |
VIRTUAL PROTOTYPE SYSTEMS
ABSTRACT: By today's standards, early microprocessor-based systems were simple, not least because they typically employed only a single processor (possibly with a few co-processors, such as a floating-point co-processor) with a relatively simple instruction set running at low clock frequency. This processor communicated with a small number of comparatively simple memory and peripheral devices by means of a single 8-bit or 16-bit data bus with a simple read/write and signaling protocol.
Those days have long gone. There is currently a tremendous growth in the development of systems that involve tens or hundreds of complex processors and hardware accelerators in closely coupled or networked topologies. In addition to tiered memory structures and multi-layer bus structures, these super systems — which may be executing hundreds of millions to tens of billions of instructions per second — feature extremely complex software components, and this software content is currently increasing almost exponentially. Aggressive competition makes today's electronics markets extremely sensitive to time-to-market pressures. This is especially true in consumer markets such as cell phones, where the opportunity for a new product to make an impact can sometimes be as little as two to four months. However, a recent report showed that more than 50 percent of embedded system developments run late, while 20 percent either fail to meet their requirements specifications or are cancelled in their entirety.1 The problem is that, in conventional system development environments, hardware design precedes software development. This sequential process simply cannot support the development of today's super systems. This article first introduces examples of super systems and outlines the problems presented by increasing system size and complexity. The concept of architecture-driven design based on the use of virtual system prototypes (VSPs) is then discussed as a potential solution. Finally, a productivity, development time, and risk comparison is made between the back-end engineering resource loading associated with the conventional environment and the front-end loading resulting from the architecture-driven, VSP-based methodology.
KEY WORDS: hardware/software co-design, rapid system prototyping,
Design-space exploration, mobile terminal, SDL, SoC, VSP
DOWNLOAD PPT OF VIRTUAL PROTOTYPE SYSTEMS